Active matrix electroluminescent display devices, and their manufacture

ABSTRACT

Physical barriers ( 210 ) are present between neighbouring pixels ( 200 ) on a circuit substrate ( 100 ) of an active-matrix electroluminescent display device, particularly with LEDs ( 25 ) of organic semiconductor materials. The invention forms these barriers ( 210 ) with metal or other electrically-conductive material ( 240 ) that serves as an interconnection between a first circuit element ( 21, 4, 5, 6, 140, 150, 160,  T 1,  T 2,  Tm, Tg, Ch) of the circuit substrate and a second circuit element ( 400, 400   s   , 23 ), for example, a sensor ( 400   s ) of a sensor array supported over the pixel array. The conductive barrier material ( 240 ) is insulated ( 40 ) at the sides of the barriers adjacent to the LEDs and has an un-insulated top connection area ( 240   t ) at which the second circuit element is connected to the conductive barrier material ( 240 ).

This invention relates to active-matrix electroluminescent displaydevices, particularly but not exclusively using light-emitting diodes ofsemiconducting conjugated polymer or other organic semiconductormaterials. The invention also relates to methods of manufacturing suchdevices.

Such active-matrix electroluminescent display devices are known,comprising an array of pixels present on a circuit substrate, whereineach pixel comprises an electroluminescent element, typically of organicsemiconductor material. The electroluminescent elements are connected tocircuitry in the substrate, for example drive circuitry that includessupply lines and matrix addressing circuitry that includes addressing(row) and signal (column) lines. These lines are generally formed bythin-film conductor layers in the substrate. The circuit substrate alsoincludes addressing and drive elements (typically thin-film transistors,hereafter termed “TFT”s) for each pixel.

In many such arrays, physical barriers of insulating material arepresent between neighbouring pixels in at least one direction of thearray. Examples of such barriers are given in published United Kingdompatent application GB-A-2 347 017, published PCT patent applicationWO-A1-99/43031, published European patent applications EP-A-0 895 219,EP-A-1 096 568, and EP-A-1 102 317, the whole contents of which arehereby incorporated herein as reference material.

Such barriers are sometimes termed “walls”, “partitions”, “banks”,“ribs”, “separators”, or “dams”, for example. As can be seen from thecited references, they may serve several functions. They may be used inmanufacture to define electroluminescent layers and/or electrode layersof the individual pixels and/or of columns of pixels. Thus, for example,the barriers prevent pixel overflow of conjugate polymer materials thatmay be ink-jet printed for red, green and blue pixels of a colourdisplay or spin-coated for a monochrome display. The barriers in themanufactured device can provide a well-defined optical separation ofpixels. They may also carry or comprise conductive material (such asupper electrode material of the electroluminescent element), asauxiliary wiring for reducing the resistance of (and hence the voltagedrops across) the common upper electrode of the electroluminescentelements.

It is an aim of the present invention to enhance the capabilities and/orperformance of active-matrix electroluminescent display devices, in amanner that is compatible with the basic device structure, its layoutand its electronics.

According to one aspect of the present invention, there is provided anactive-matrix electroluminescent display device having the features setout in Claim 1.

In accordance with the invention, the physical barriers between pixelsare used to provide interconnections between a first circuit element ofthe circuit substrate and a second circuit element that is connected atthe top of the barrier. Thus, these pixel barriers are partly (possiblyeven predominantly) of electrically-conductive material (typicallymetal) which provides the interconnection, while also being insulated atleast at the sides of the barriers adjacent to the electroluminescentelements.

Much versatility is possible in accordance with the invention. Variouslayout features can be adopted for the pixel barriers, depending on thecircuit elements being interconnected. Thus, the conductive barriermaterial may provide interconnections that are localised to, forexample, individual pixels or groups of pixels, or interconnections thatmay be located outside the pixel array. Thus, each un-insulated topconnection area may itself be localised as part of a connection patternalong the top of the barriers, and/or the interconnecting conductivebarrier material may be localised in, for example, separately insulatedlengths of the barriers.

The first and second circuit elements may take a variety of forms,depending on the particular improvement or enhancement or adaptationbeing made. Typically, the first circuit element of the circuitsubstrate may be one or more thin-film elements of the group comprising:a conductor layer; an electrode connection; a supply line; an addressingline; a signal line; a thin-film transistor; a thin-film capacitor. Thesecond circuit element may be another such thin-film element in thecircuit substrate and/or, for example, an electrode connection of theelectroluminescent element of a respective pixel or an added componentsuch as a sensor.

The last possibility permits various forms of sensor array to beintegrated together with the array of pixels. The sensor array may beintegrated within the circuit substrate. However, the sensor array maybe supported on top of the barriers and over the pixel array. Thisprovides a compact layout and is particularly suitable for direct peninput and/or finger-print sensing. The sensor array may even sharematrix addressing circuitry of the pixel array in the circuit substrate.This simplifies the integration of the sensor array with the pixelarray. Sharing may be achieved in a manner similar to that disclosed in,for example, U.S. Pat. No. 5,386,543 and U.S. Pat. No. 5,838,308(Philips refs: PHB33816 and PHB33715). The whole contents of U.S. Pat.No 5,386,543 and U.S. Pat. No. 5,838,308 are hereby incorporated hereinas reference material.

As well as using the barriers to provide interconnections in accordancewith the present invention, the barriers (or at least other separatelyinsulated lengths of the barriers) may serve different functions. Theymay be used to form, for example, a component such as a capacitor orinductor or transformer and/or to back-up or replace thin-film conductorlines of the circuit substrate. These back-up or replacement lines maybe, for example an address line, a signal line or a supply line.

According to another aspect of the present invention, there are alsoprovided advantageous methods of manufacturing such an active-matrixelectroluminescent display device.

Various advantageous features and feature-combinations in accordancewith the present invention are set out in the appended Claims.

These and others are illustrated in embodiments of the invention thatare now described, by way of example, with reference to the accompanyingdiagrammatic drawings, in which:

FIG. 1 is a circuit diagram for four pixel areas of an active-matrixelectroluminescent display device which can be provided withinterconnections in accordance with the invention;

FIG. 2 is a cross-sectional view of part of the pixel array and circuitsubstrate of one embodiment of such a device, showing one example of aconductive barrier construction for forming interconnections to a TFTsource or drain line in accordance with the invention;

FIG. 3 is a cross-sectional view of part of the pixel array and circuitsubstrate of a similar embodiment of such a device, showing anotherexample of a conductive barrier construction for forminginterconnections to a TFT gate line in accordance with the invention;

FIG. 4 is a cross-sectional view of the interconnection part of such anembodiment as that of FIG. 2 or FIG. 3, showing an example of a modifiedconductive barrier construction that uses a metal coating for forminginterconnections in accordance with the invention;

FIG. 5 is a cross-sectional view of part of such a device such as thatof FIG. 2 or FIG. 3, showing interconnections in accordance with theinvention for a pressure sensor integrated with the electroluminescentdevice;

FIG. 6 is a cross-sectional view of part of such a device such as thatof FIG. 2 or FIG. 3, showing interconnections in accordance with theinvention for a capacitance sensor integrated with theelectroluminescent device;

FIG. 7 is a cross-sectional view of part of such a device such as thatof FIG. 2 or FIG. 3, showing interconnections in accordance with theinvention for a direct input sensor integrated with theelectroluminescent device;

FIG. 8 is a cross-sectional view of part of such a device such as thatof FIG. 2 or FIG. 3, showing interconnections in accordance With theinvention between upper and lower electrodes of adjacent pixels orsub-pixels;

FIG. 9 is a plan view of four pixel areas showing a specific example oflayout features for a particular embodiment of a device in accordancewith the invention, with side-by-side conductive barriers;

FIG. 10 is a cross-sectional view through the side-by-side barriers ofFIG. 9, taken on the line X-X of FIG. 9;

FIG. 11 is a plan view of another example of layout features for aparticular embodiment of a device in accordance with the invention, withtransverse conductive barriers;

FIG. 12 is a sectional view of a device part with yet another example ofa conductive barrier construction for forming interconnections inaccordance with the invention;

FIGS. 13 to 16 are sectional views of a device part such as that of FIG.2 or FIG. 3 at stages in its manufacture with one particular embodimentin accordance with the invention; and

FIG. 17 is a sectional view a device part at the insulation stage,illustrating a modification in the insulation of the conductive barrierinterconnections that is also in accordance with the present invention.

It should be noted that all the Figures are diagrammatic. Relativedimensions and proportions of parts of these Figures have been shownexaggerated or reduced in size, for the sake of clarity and conveniencein the drawings. The same reference signs are generally used to refer tocorresponding or similar features in modified and different embodiments.

EMBODIMENTS OF FIGS. 1 TO 4

The active-matrix electroluminescent display device of each of the FIGS.1 to 4 embodiments comprises an array of pixels 200 on a circuitsubstrate 100 with matrix addressing circuitry. Physical barriers 210are present between at least some of the neighbouring pixels in at leastone direction of the array. At least some of these barriers 210 areconstructed with conductive barrier material 240 that is used as aninterconnection in accordance with the present invention. Apart fromthis special construction and use of the barriers 210 in accordance withthe present invention, the display may be constructed using known devicetechnologies and circuit technologies, for example as in the backgroundreferences cited hereinbefore.

The matrix addressing circuitry comprises transverse sets of addressing(row) and signal (column) lines 150 and 160, respectively, asillustrated in FIG. 1. An addressing element T2 (typically a thin-filmtransistor, hereafter termed “TFT”) is incorporated at each interceptionof these lines 150 and 160. It should be understood that FIG. 1 depicts,by way of example, one specific pixel circuit configuration. Other pixelcircuit configurations are known for active matrix electroluminescentdisplay devices. It should readily be understood that the presentinvention may be applied to the pixel barriers of such a deviceregardless of the specific pixel circuit configuration of the device.

Each pixel 200 comprises a current-driven electroluminescent element 25(21,22,23), typically a light-emitting diode (LED) of organicsemiconductor material. The LED 25 is connected in series with a driveelement T1 (typically a TFT) between two voltage supply lines 140 and230 of the array. These two supply lines are typically a power supplyline 140 (with voltage Vdd) and a ground line 230 (also termed “returnline”). Light emission from the LED 25 is controlled by the current flowthrough the LED 25, as altered by its respective drive TFT T1.

Each row of pixels is addressed in turn in a frame period by means of aselection signal that is applied to the relevant row conductor 150 (andhence to the gate of the addressing TFTs T2 of the pixels of that row).This signal turns on the addressing TFT T2, so loading the pixels ofthat row with respective data signals from the column conductors 160.These data signals are applied to the gate of the individual drive TFTT1 of the respective pixel. In order to hold the resulting conductivestate of the drive TFT T1, this data signal is maintained on its gate 5by a holding capacitor Ch that is coupled between this gate 5 and thedrive line 140,240. Thus, the drive current through the LED 25 of eachpixel 200 is controlled by the driving TFT T1 based on a drive signalapplied during the preceding address period and stored as a voltage onthe associated capacitor Ch. In the specific example of FIG. 1, T1 isshown as a P-channel TFT, whereas T2 is shown as an N-channel TFT.

This circuitry can be constructed with known thin-film technology. Thesubstrate 100 may have an insulating glass base 10 on which aninsulating surface-buffer layer 11, for example, of silicon dioxide isdeposited. The thin-film circuitry is built up on the layer 11 in knownmanner.

FIGS. 2 and 3 show TFT examples Tm and Tg, each comprising: an activesemiconductor layer 1 (typically of polysilicon); a gate dielectriclayer 2 (typically of silicon dioxide); a gate electrode 5 (typically ofaluminium or polysilicon); and metal electrodes 3 and 4 (typically ofaluminium) which contact doped source and drain regions of thesemiconductor layer 1 through windows (vias) in the over-lyinginsulating layer(s) 2 and 8. Extensions of the electrodes 3, 4 and 5 mayform, for example, interconnections between the elements T1, T2, Ch andLED 25, and/or at least part of the conductor lines 140, 150 and 160,depending on the circuit function provided by the particular TFT (forexample, the drive element T1 or the addressing element T2 or anotherTFT of the circuit substrate). The holding capacitor Ch may be formedsimilarly, in known manner, as a thin-film structure inside the circuitsubstrate 100.

The LED 25 typically comprises a light-emitting organic semiconductormaterial 22 between a lower electrode 21 and an upper electrode 23. In apreferred particular embodiment, semiconducting conjugated polymers maybe used for the electroluminescent material 22. For a LED that emits itslight 250 through the substrate 100, the lower electrode 21 may be ananode of indium tin oxide (ITO), and the upper electrode 23 may be acathode comprising, for example, calcium and aluminium. FIGS. 2 and 3illustrate a LED construction in which the lower electrode 21 is formedas a thin film in the circuit substrate 100. The subsequently-depositedorganic semiconductor material 22 contacts this thin-film electrodelayer 21 at a window 12 a in a planar insulating layer 12 (for exampleof silicon nitride) that extends over the thin-film structure of thesubstrate 100.

As in known devices, the devices of FIGS. 1 to 4 in accordance with thepresent invention include physical barriers 210, between at least someof the neighbouring pixels in at least one direction of the array. Thesebarriers 210 may also be termed “walls”, “partitions”, “banks”, “ribs”,“separators”, or “dams”, for example. Depending on the particular deviceembodiment and its manufacture, they may be used in known manner, forexample:

-   -   to separate and prevent overflow of a polymer solution between        the respective areas of the individual pixels 200 and/or columns        of pixels 200, during the provision of semiconducting polymer        layers 22;    -   to provide a self-patterning ability on the substrate surface in        the definition of the semiconducting polymer or other        electroluminescent layers 22 for the individual pixels 200        and/or for columns of pixels 200 (and possibly even a        self-separation of individual electrodes for the pixels, for        example an individual bottom layer of the upper electrodes 23);    -   to act as a spacer for a mask over the substrate surface during        the deposition of at least an organic semiconductor material 22        and/or electrode material;    -   to form opaque barriers 210 for a well-defined optical        separation of the pixels 200 in the array, when light 250 is        emitted through the top (instead of, or as well as, the bottom        substrate 100).

Whatever their specific use in these known ways, at least some insulatedportions of the physical barriers 210 in embodiments of the presentinvention are constructed and used in a special manner. Thus, the pixelbarriers 210 of FIGS. 2 to 4 comprise metal 240 (or otherelectrically-conductive material 240) that is insulated from the LEDs 25and that provides an interconnection between a first circuit element ofthe circuit substrate 100 and a second circuit element of the device.These circuit elements are connected at un-insulated bottom and topconnection areas 240 b, 240 t of the conductive barrier material 240.

The first and second circuit elements may take a variety of forms,depending on the particular improvement or enhancement or adaptationbeing made. Typically, the first circuit element of the circuitsubstrate 100 may be one or more thin-film elements of the groupcomprising: a conductor layer and/or an electrode connection 4, 5, 6; asupply line 140; an addressing line 150; a signal line 160; a thin-filmtransistor T1, T2, Tm, Tg; a thin-film capacitor Ch. The second circuitelement may be another such thin-film element in the circuit substrate100 and/or, for example, an electrode connection of the LED 25 of arespective pixel or an added component such as a sensor.

FIGS. 2 to 4 show the un-insulated top connection area 240 t, butwithout any specific second circuit element (upper circuit element 400)connected thereto. Particular examples of a second circuit element aredescribed below with reference to FIGS. 5 to 8. However, it shouldreadily be understood that the present invention can be applied to theinterconnection of a wide variety of upper circuit elements 400 tocircuitry in the circuit substrate 100 by means of such pixel barriers210 in accordance with the invention.

In the embodiment of FIG. 2, the first circuit element is an extensionof the source and/or drain electrode of TFT Tm. It may form a signal(column) line 160, for example, of the substrate circuitry when Tm isT2, or a drive line 140 when Tm is T1. In the embodiment of FIG. 3, thefirst circuit element is an extension of the gate electrode 5 of TFT Tg.It may form an addressing (row) line 150, for example, of the substratecircuitry when Tg is T2.

FIGS. 2 and 3 show the bottom connection of the conductive barriermaterial 240 to the first circuit element 4,5 at connection windows 12 bin the intermediate insulating layer 12. However, it should beunderstood that these windows 12 b may often not be in the same plane asthe TFT Tm, Tg. In particular, there is generally insufficient spacebetween the source and drain electrodes 3 and 4 of TFT Tg to accommodatea window 12 b. Thus, the window 12 b is depicted in broken outline inFIG. 3 to indicate its location outside the plane of the drawing paper.

The pixel barriers 210 in the embodiments of FIGS. 2 to 4 arepredominantly of electrically-conductive material 240, 240 x, preferablymetal for very low resistivity (for example aluminium or copper ornickel or silver). The barriers 210 of FIGS. 2 and 3 comprise a bulk orcore of the conductive material that provides the interconnection 240and that has an insulating coating 40 on its sides and on its top(except where the top connection area 240 t is exposed). The barrier 210of FIG. 4 comprises a bulk or core of conductive material 240 x that hasan insulating coating 40 x on its sides and on its top. The conductivematerial that provides the interconnection 240 in FIG. 4 is a metalcoating that extends on the insulating coating 40 x. An insulatingcoating 40 extends on the sides and on the top of the metal coating 240,except where the top connection area 240 t is exposed. This structure ofFIG. 4 is more versatile than that of FIGS. 2 and 3. It permits themetal core 240 x to be used for another purpose, for example, to back-upor even replace the lines 140, 150 or 160, so reducing their lineresistance. The interconnection metal coating 240 may even be localisedto specific locations along the barrier 210 where these interconnectionsare required, for example at individual pixels or sub-pixels.

EMBODIMENTS OF FIGS. 5 TO 7 WITH SENSOR ARRAYS

In each of the embodiments of FIGS. 5 to 7, an array of sensors 400 s isintegrated together with the array of pixels 200. The sensors 400 sprovide the second circuit elements 400 that are connected by theconductive barrier material 240 to the first circuit element of thecircuit substrate 100. A variety of sensor arrays may be integrated withthe display in accordance with the invention. Thus, the sensing arraymay have, for example, a short-circuit touch input, or a pressure input,or a capacitance input, or a light-pen input.

For individual interconnections from a two-dimensional sensor array, theconductive barrier material 240 is generally split up into respectiveinsulated lengths in the barriers 210, corresponding to the individualsensors 400 s.

In this integrated sensor situation, the first circuit element may be,for example, a source/drain 4 or gate 5 of a TFT in the substrate 100.Preferably, the first circuit element is part of matrix addressingcircuitry for both the array of pixels 200 and the array of sensors 200s. Thus, the first circuit element may be the source/drain line 4, 160of TFT T2 for pixel addressing.

In each of the embodiments of FIGS. 5 to 7, the sensing capability isprovided at the front of the display, through which the light 250 isemitted. The sensor array is supported on top of the barriers 210 andover the pixel array. An insulating planarising layer 412 is presentover the pixel array, with a thickness that extends to the top of thebarriers 210 to support the sensor array over the pixel array. AlthoughFIGS. 5 to 8 illustrate an interconnecting metal-core structure as inFIGS. 2 and 3, modifications are possible using, for example, aninterconnecting metal-coating structure as in FIG. 4.

The FIG. 5 embodiment illustrates a pressure sensor structure comprisinga compressible layer 422 of dielectric or highly resistive material.This compressible layer is stacked between a transparent upper electrodelayer 423 of, for example, ITO and the underlying conductive barriermaterial 240 and insulating planarising layer 412. The upper electrodelayer 423 is coated with a protective layer 440. When pressure 500 isapplied to this stack, the spacing between the electrode layer 423 andthe conductive barrier material changes causing either a measurablechange in capacitance across the dielectric or a reduction in resistanceacross the highly resistive material. This is a most advantageousembodiment, in that the electrode layer 423 also provides ESD protectionfor the circuit inputs.

FIG. 6 illustrates a capacitive sensor, for example a finger-printsensor. An array of electrode pads 421 of ITO or metal are connected atthe top of the corresponding array of conductive barrier material 240 toform one plate of a respective capacitor having thereon a capacitordielectric layer 430. The other plate of the capacitor is formed by afinger or other object to be sensed, when placed on the dielectric layer430.

FIG. 7 illustrates a direct input sensor having electrode pads 424 ofITO that are connected at the top of the corresponding array ofconductive barrier material 240. The direct input may be a current orvoltage input from, for example, a wired pen that touches the pads 424.Alternatively, the direct input may simply be a short-circuit by an(un-wired) conductive pen between neighbouring pads 424, for examplebetween a pad 424 connected to a row conductor 150 and a pad 424connected to a column conductor 160. Current flow resulting from such ashort-circuit can be measured at the periphery of the display todetermine which pixel was shorted.

EMBODIMENT OF FIG. 8 WITH PIXEL OR SUB-PIXEL INTERCONNECT

The second circuit element in the embodiment of FIG. 8 is an upperelectrode 23 of the LED 25, which is connected by the conductive barriermaterial 240 to a thin-film element of the circuit substrate 100. Suchan interconnection permits the integration of circuitry to bothelectrodes 21 and 23 of the given LED 25.

However, in the particular embodiment depicted in FIG. 8, the bottomconnection of the conductive barrier material 240 is to a thin-filmelement that forms the lower electrode of a neighbouring LED 25. Such aconstruction can be adopted for a display each pixel of which comprises,for example, side-by-side sub-pixels with the barriers 210there-between. In this case, the conductive barrier material 240connects the upper electrode 23 of one sub-pixel 200 b to the lowerelectrode 21 of an adjacent sub-pixel 200 a.

LAYOUT EMBODIMENTS OF FIGS. 9 AND 10 AND OF FIG. 11

A wide variety of layout configurations are possible for theinterconnect barrier material 240 in devices in accordance with theinvention. Advantageously, the interconnect barrier material 240 may becombined in a composite layout with other sections of barrier 210 xbetween the pixels.

FIGS. 9 and 10 illustrate one composite layout in which the conductivebarrier material 240 x of the additional barrier sections 210 x may backup or even replace the drive supply lines 140 of the substrate 100. Thematrix thin-film circuit area is designated as 120 in FIG. 9. In thisparticular example, the insulated lengths of the interconnect barriermaterial 240 extend parallel to the additional barrier lines 210 x, 140.

FIG. 11 illustrates another composite layout in which the additionalbarrier sections 210 x (240 x, 40 x ) are transverse to the interconnectbarrier material 240. In this case, the conductive barrier material 240x of the additional barrier sections 210 x may back up or even replacethe lines 140 or 150 or 160 of the substrate 100. Alternatively, theconductive barrier material 240 x of the additional barrier sections 210x may form transverse interconnects for a direct-input sensor array suchas that of FIG. 7.

MODIFIED BARRIER EMBODIMENT OF FIG. 12

In the embodiments of FIGS. 2 to 8 and FIG. 10, barriers 210 and 210 xare shown as being predominantly of conductive material 240 and 240 x.FIG. 12 shows a modified embodiment wherein the barrier 210 ispredominantly of insulating material 244. In this-case, vias 244 b areetched or milled through the insulating material 244 to the circuitelement 4, 5 in the circuit substrate 100. A metal coating 240 providesthe conductive barrier material that extends on top of the insulatingbarrier 210 and in the vias 244 b therethrough.

The metal coating 240 of the barrier 210 may be formed simultaneouslywith a main part 23a of the upper electrode 23 of the LED 25, in aself-aligned manner. Thus, a layer of metal may be depositedsimultaneously for the metal coating 240 and electrode 23 which areseparated by a shadow-masking effect of an overhang shape in the side ofthe barrier 210, as illustrated in FIG. 12. This is one possible processembodiment for forming barrier interconnects 210, 240 in accordance withthe present invention. FIGS. 14 to 17 illustrate other processembodiments for barrier interconnects 210, 240 that are predominantly ofmetal.

PROCESS EMBODIMENT OF FIGS. 13 TO 16

Apart from constructing and using its barriers 210 with interconnectionmaterial 240, the active-matrix electroluminescent display of a devicein accordance with the present invention may be constructed using knowndevice technologies and circuit technologies, for example as in thecited background references.

FIGS. 13 to 16 illustrate novel process steps in a particularmanufacturing embodiment. The thin-film circuit substrate 100 with itsupper planar insulating layer 12 (for example, of silicon nitride) ismanufactured in known manner. Connection windows (such as vias 12 a, 12b, 12 x etc.) are opened in the layer 12 in known manner, for example byphotolithographic masking and etching. However, in order to manufacturea device in accordance with the present invention, the pattern of thesevias include the vias 12 b, 12 x that expose elements 4, 5, 150, etc.for bottom connection with the conductive barrier material 240, 240 x.The resulting structure is illustrated in FIG. 13. This stage is commonregardless of whether the barriers 210 are predominantly of conductivematerial as in FIGS. 2 to 8 and FIG. 10 or predominantly of insulatingmaterial as in FIG. 12.

The formation of barriers 210 predominantly of insulating material hasbeen described above with reference to FIG. 12. Suitable process stepsfor barriers 210 predominantly of conductive material (as in FIGS. 2 to8 and FIG. 10) will now be described with reference to FIGS. 14 to 16.

In this case, electrically-conductive material for the barriers 210 isdeposited on the insulating layer 12 at least in its vias 12 a, 12 b, 12x etc. The desired lengths and layout pattern for the barriers 210 isobtained using known masking techniques. FIG. 14 illustrates anembodiment in which at least the bulk 240 of the conductive barriermaterial (for example, copper or nickel or silver) is deposited byplating. In this case, a thin seed layer 240 a of, for example, copperor nickel or silver is first deposited over the insulating layer 12 andits vias 12 a, 12 b, 12 x etc, the barrier layout pattern is definedwith a photolithographic mask, and then the bulk 240 of the conductivebarrier material is plated to the desired thickness. The resultingstructure is illustrated in FIG. 14.

Then, using CVD (chemical vapour deposition), insulating material (forexample silicon dioxide or silicon nitride) is deposited for theinsulating coating 40. The deposited material is left on the sides andtop of the conductive barrier material by patterning using knownphotolithographic masking and etching techniques. Thereafter themanufacture is continued in known manner to form the LEDs 25. Thus, forexample, conjugate polymer materials 22 may be ink-jet printed orspin-coated for the pixels 200. The barriers 240,40 with theirinsulating coating 40 can be used in known manner to prevent polymeroverflow from the pixel areas in between the physical barriers 240,40.The upper electrode material 23 is deposited on the layer 22. Theresulting structure is illustrated in FIG. 15.

Thereafter, in the case of the sensors of FIGS. 5 to 7, a layer ofplanarising material 412′ is put down over the LEDs 25. This layer 412′may be etched back to expose the insulating coating 40 at the top of thebarriers 210. This exposed top part of the insulating coating 40 maythen be etched away to form the un-insulated top connection area 240 tof the barrier 210, as illustrated in FIG. 16. The sensor structure isthen provided on top of this connection area 240 t and planarising layer412.

MODIFIED PROCESS EMBODIMENT OF FIG. 17

This embodiment uses an anodisation treatment (instead of deposition) toprovide the insulating coating 40 at least at the sides of the barriers210 adjacent to the pixel areas. Typically, the conductive barriermaterial 240 may comprise aluminium. The desired lengths and layoutpattern of the deposited aluminium can be defined using knownphotolithographic masking and etching techniques. FIG. 17 shows thephotolithically-defined etchant-mask 44 retained on the top of thealuminium barrier pattern 240.

Then, an anodic insulating coating of aluminium oxide is formed on atleast the sides of the aluminium barrier material 240 using knownanodisation techniques. Thus, no extra mask is needed to define thelayout for this coating 40.

As illustrated in FIG. 17, the mask 44 can be retained during thisanodisation, in areas where it is desired to protect and form theun-insulated top connection area 240 t. In these areas, the anodiccoating is formed at only the sides of the aluminium barrier pattern240. The mask 44 may be removed before this anodisation, from areaswhere the anodic coating is required at both the sides and top of thealuminium barrier pattern 240. Alternatively, the mask 44 of aninsulating polymer or, for example, silicon dioxide or nitride may beretained in these areas where insulation is desired over the top of thebarrier 210(240,40) in the manufactured device.

In the embodiments described so far, the conductive barrier material 240is a thick opaque metal, for example, aluminium, copper, nickel orsilver. However, other conductive materials 240 may be used, for examplea metal silicide or (less advantageously) a degenerately-dopedpolysilicon both of which may be surface-oxidised to form the insulatingcoating 40. If transparent barriers 210 are required, then ITO may beused for the conductive barrier material 240. Furthermore, it should benoted that line resistance can be significantly reduced by usingconductive barrier material 240,240 x to replace or to back up aconductor line (for example, 140, 150 or 160) of the circuit substrate10. Thus, along a given line, the conductive barrier material 240 canhave a cross-sectional area that is at least twice (possibly even anorder of magnitude) larger than that of a typical conductor layer in thecircuit substrate 100 (for example, a source/drain line 4,6 (140,160) ofTFT Tm, or a gate line 5 (150) of TFT Tg). Typically, the conductivebarrier material 240 may have a thickness Z that is a factor-of two ormore (for example at least five times) larger than the thickness z ofthis TFT conductor layer in the circuit substrate 100. In a specificexample Z may be between 2 μm and 5 μm as compared with 0.5 μm or lessfor z. Typically, the conductive barrier material 240 may have a linewidth Y that is the same width (or even at least twice as large) as theline width y of the TFT conductor layer. In a specific example Y may be20 μm as compared with 10 μm for y.

From reading the present disclosure, other variations and modificationswill be apparent to persons skilled in the art. Such variations andmodifications may involve equivalent and other features which arealready known in the art (for example in the cited backgroundreferences) and which may be used instead of or in addition to featuresalready described herein.

Although Claims have been formulated in this Application to particularcombinations of features, it should be understood that the scope of thedisclosure of the present invention also includes any novel feature orany novel combination of features disclosed herein either explicitly orimplicitly or any generalisation thereof, whether or not it relates tothe same invention as presently claimed in any Claim and whether or notit mitigates any or all of the same technical problems as does thepresent invention.

The Applicants hereby give notice that new Claims may be formulated toany such features and/or combinations of such features during theprosecution of the present Application or of any further Applicationderived therefrom.

1. An active-matrix electroluminescent display device comprising: acircuit substrate on which an array of pixels is present with physicalbarriers s between at least some of the neighbouring pixels in at leastone direction of the array; each pixel comprising an electroluminescentelement; the circuit substrate comprising circuitry to which theelectroluminescent elements are connected; the physical barrierscomprising conductive material that serves as an interconnection betweena first circuit element of the circuit substrate and a second circuitelement of the device; which conductive barrier material is insulated atleast at the sides of the barriers adjacent to the electroluminescentelements and has top and bottom connection areas that are un-insulatedwhere the first and second circuit elements are connected to theconductive barrier material.
 2. A device according to claim 1, whereinthe first circuit element of the circuit substrate is at least onethin-film element of a group comprising: a conductor layer; an electrodeconnection; a supply line; an addressing line; a signal line; athin-film transistor; a thin-film capacitor.
 3. A device according toclaim 1, wherein the second circuit element is an upper electrode of theelectroluminescent element, and the first circuit element is at leastone thin-film element of the circuit substrate.
 4. A device according toclaim 3, wherein each pixel comprises side-by-side sub-pixels with thebarriers there-between and with the conductive barrier materialconnecting the upper electrode of one sub-pixel to the lower electrodeof an adjacent sub-pixel, which lower and upper electrodes form thefirst and second circuit elements.
 5. A device according to claim 1 orclaim 2, wherein an array of sensors is integrated together with thearray of pixels, and the sensors provide the second circuit elementsthat are connected by the conductive barrier material to the firstcircuit element of the circuit substrate.
 6. A device according to anyone of the preceding claims, wherein an array of sensors is integratedtogether with the array of pixels, the circuit substrate comprisesmatrix addressing circuitry for both the array of pixels and the arrayof sensors, and the conductive barrier material connects sensors of thearray to the matrix addressing circuitry.
 7. A device according to claim5 or claim 6, wherein the sensor array is supported on top of thebarriers and over the pixel array.
 8. A device according to claim 7,wherein a planarising layer is present over the pixel array with athickness that extends to the top of the barriers to support the sensorarray over the pixel array.
 9. A device according to any one of thepreceding claims, wherein insulated lengths of the barriers arepredominantly of the conductive barrier material (and preferablycomprising metal).
 10. A device according to any one of the precedingclaims, wherein the barrier comprises a metal core which provides theconductive barrier material that is connected with the first circuitelement and that has an insulating coating on at least its sides.
 11. Adevice according to any one of claims 1 to 9, wherein the barriercomprises a metal coating which provides the conductive barrier materialthat is connected with the first circuit element and that has aninsulating coating on at least its sides.
 12. A device according to anyone of claims 1 to 8, wherein the physical barrier is predominantly ofinsulating material through which vias extend for connection with thecircuit element in the circuit substrate, and wherein a metal coatingthat provides the conductive barrier material extends on top of thephysical barrier and in the vias through the physical barrier.
 13. Adevice according to any one of the preceding claims, wherein theelectroluminescent element is a current-driven light-emitting diode oforganic semiconductor material.
 14. A device according to any one of thepreceding claims, wherein, under the conductive barrier material,connection windows are present in an intermediate insulating layer onthe circuit substrate to permit connection to the first circuit element.15. A method of manufacturing an active-matrix electroluminescentdisplay device according to any one of the preceding claims, includingthe steps of: (a) forming the physical barriers withelectrically-conductive material that is deposited on electrodeconnections to the first circuit element of the circuit substrate andwith insulation at least at the sides of the physical barriers adjacentto the pixel areas, the physical barriers having an un-insulated topconnection area to the conductive barrier material at the top of thebarriers; (b) providing at least part of the electroluminescent elementsin the pixel areas in between the physical barriers; and (c) providingthe second circuit element in connection with the conductive barriermaterial at the un-insulated top connection area of the barriers.
 16. Amethod according to claim 15, wherein the insulation comprises aninsulating coating that is deposited on at least the sides and top ofthe conductive barrier material and that is subsequently etched from thetop connection area.
 17. A method according to claim 15, wherein theconductive barrier material comprises aluminium, and the insulationcomprises an insulating coating that is formed on the sides of thealuminium barrier material by anodisation, while masking the topconnection area against anodisation.
 18. A method according to claim 15,wherein the step (a) involves forming the physical barrier predominantlyof insulating material through which vias are formed for connection withthe circuit element at the connection windows on the circuit substrate,and wherein the electrically-conductive material is deposited as aconductive coating on top of the physical barrier and in the viasthrough the physical barrier.
 19. A method according to claim 18,wherein the conductive coating for the physical barrier and an upperelectrode of the electroluminescent element are deposited simultaneouslyand are separated by a shadow-masking effect of an overhang shape in theside of the physical barrier.